Scalable Interconnects
Scalable Interconnects is an interconnect architecture that belongs to the class of high-performance communication subsystems in parallel and distributed computing systems, distinguished by its ability to maintain efficient performance and low latency as the number of processing nodes increases proportionally.
153
Publications
8.4K
Citations
581
Authors
170
Institutions
Publications per year
2017–2026
19
153
Cray T3D: a new dimension for Cray Research
Roland Kessler, James L. Schwarzmeier · 2002 · 302 citations
Jung Ho Ahn, Nathan Binkert, Al Davis et al. · 2009 · 257 citations
Tom Lovett, Russell M. Clapp · 1996 · 254 citations · Full text
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170
Intel (United States)
Santa Clara, United States
7 h-index
42 publications
1.7K citations
The Ohio State University
Columbus, United States
6 h-index
21 publications
694 citations
Hewlett-Packard (United States)
Palo Alto, United States
4 h-index
10 publications
1.5K citations
Los Alamos National Laboratory
Los Alamos, United States
4 h-index
13 publications
544 citations
University of California, Berkeley
Berkeley, United States
3 h-index
3 publications
224 citations
Fujitsu (Japan)
Kawasaki, Japan
3 h-index
11 publications
1.1K citations
Massachusetts Institute of Technology
Cambridge, United States
3 h-index
18 publications
1.2K citations
University of California, Davis
Davis, United States
3 h-index
11 publications
700 citations
1–8 of 170
7 publications · 756 citations
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TPDS · 4 publications · 162 citations
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2 publications · 25 citations
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2 publications · 25 citations
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2 publications · 46 citations
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