Resilient Computer Architecture

Resilient Computer Architecture is a computer architecture designed to maintain functional correctness and performance stability in the presence of process variations, environmental fluctuations, and aging effects, particularly under near-threshold voltage operation, by incorporating adaptive and fault-tolerant mechanisms at the hardware level.

65

Publications

4.1K

Citations

246

Authors

94

Institutions

Publications per year

2017–2026

15

Authors

246

  1. SM
    Subhasish Mitra

    Stanford University, United States

    6 publications · 887 citations

    6

    h-index

  2. LL
    Larkhoon Leem

    Stanford University, United States

    5 publications · 513 citations

    5

    h-index

  3. HC
    Hyungmin Cho

    Stanford University, United States

    5 publications · 513 citations

    5

    h-index

  4. GK
    Gábor Karsai

    Vanderbilt University, United States

    4 publications · 163 citations

    4

    h-index

  5. AD
    Abhishek Dubey

    Vanderbilt University, United States

    4 publications · 163 citations

    4

    h-index

1–5 of 246

Venues

  1. IEEE Micro

    3 publications · 70 citations

    3

    h-index

  2. 2

    h-index

  3. 2

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  4. IEEE/ACM Transactions on Networking

    TON · 1 publications · 24 citations

    1

    h-index

  5. 1

    h-index

1–5