Concepedia

Register-transfer Level Generation

Register-Transfer Level Generation is a formal method in hardware design automation that systematically synthesizes digital circuits by generating register-transfer level descriptions from higher-level behavioral specifications, distinguishing itself through the explicit modeling of data flow and control logic between registers.

39

Publications

1.2K

Citations

120

Authors

47

Institutions

Publications per year

2017–2026

9

Variants

Rtl Generation

Parents

Publications

39

ASIP design methodologies: survey and issues

Manoj Jain, Anshul Kumar · 2002 · 126 citations

, , +16

High-level synthesis of nonprogrammable hardware accelerators

Robert Schreiber, Shail Aditya, B. Ramakrishna Rau et al. · 2002 · 96 citations

, , +17

Automated High-Level Generation of Low-Power Approximate Computing Circuits

Kumud Nepal, Soheil Hashemi, Hokchhay Tann et al. · IEEE Transactions on Emerging Topics in Computing · 2016 · 77 citations

, , +17

Automatic Compilation of Diverse CNNs Onto High-Performance FPGA Accelerators

Yufei Ma, Yu Cao, Sarma Vrudhula et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2018 · 68 citations

, , +17

Efficient validation input generation in RTL by hybridized source code analysis

Lingyi Liu, Shriram K. Vasudevan · 2011 · 67 citations

, , +16

1–5 of 39

Authors

120

  1. SG
    Swathi Gurumani

    Advanced Digital Sciences Center, Singapore

    2 publications · 40 citations

    2

    h-index

  2. AR
    A. Richard Newton

    University of California, Berkeley, United States

    2 publications · 45 citations

    2

    h-index

  3. WL
    Wanwei Liu

    National University of Defense Technology, China

    2 publications · 26 citations

    2

    h-index

  4. SD
    Srinivas Devadas

    Massachusetts Institute of Technology, United States

    2 publications · 45 citations

    2

    h-index

  5. TL
    Tun Li

    National University of Defense Technology, China

    2 publications · 26 citations

    2

    h-index

1–5 of 120

Institutions

47

  1. University of Illinois Urbana-Champaign

    Urbana, United States

    3 h-index

    4 publications

    174 citations

  2. Nanyang Technological University

    Singapore, Singapore

    3 h-index

    7 publications

    110 citations

  3. University of California, Berkeley

    Berkeley, United States

    2 h-index

    4 publications

    90 citations

  4. National University of Defense Technology

    Changsha, China

    2 h-index

    8 publications

    104 citations

  5. National Taiwan University

    Taipei, Taiwan

    2 h-index

    8 publications

    120 citations

  6. Massachusetts Institute of Technology

    Cambridge, United States

    2 h-index

    2 publications

    45 citations

  7. Advanced Digital Sciences Center

    Singapore, Singapore

    2 h-index

    5 publications

    102 citations

  8. Universidade de São Paulo

    São Paulo, Brazil

    1 h-index

    4 publications

    88 citations

1–8 of 47

Venues

  1. 2

    h-index

  2. IEEE Design & Test of Computers

    2 publications · 85 citations

    2

    h-index

  3. Design, Automation, and Test in Europe

    Conference · 1 publications · 12 citations

    1

    h-index

  4. Information and Software Technology

    1 publications · 16 citations

    1

    h-index

  5. IEEE Transactions on Computers

    1 publications · 57 citations

    1

    h-index

1–5