Programmable Logic Array Design
Programmable Logic Array Design is a combinational logic synthesis technique that belongs to the class of programmable logic devices, distinguished by its structured architecture comprising a user-configurable AND array followed by a programmable OR array to implement multiple Boolean functions in sum-of-products form.
105
Publications
3.9K
Citations
223
Authors
104
Institutions
Publications per year
2017–2026
6
105
Building and using a highly parallel programmable logic array
Maya Gokhale, William T. Holmes, A. Kopser et al. · Computer · 1991 · 202 citations
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University of California, Berkeley, United States
6 publications · 176 citations
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École Polytechnique Fédérale de Lausanne, Switzerland
5 publications · 310 citations
5
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3
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3
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IBM Research - Thomas J. Watson Research Center, United States
3 publications · 65 citations
3
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1–5 of 223
104
University of California, Berkeley
Berkeley, United States
9 h-index
17 publications
434 citations
IBM (United States)
Armonk, United States
7 h-index
13 publications
388 citations

Hiroshima University
Hiroshima, Japan
4 h-index
4 publications
186 citations

Urbana University
Urbana, United States
4 h-index
6 publications
111 citations
The University of Osaka
Osaka, Japan
4 h-index
4 publications
263 citations
University of Colorado Boulder
Boulder, United States
3 h-index
3 publications
89 citations
Kyushu Institute of Technology
Kitakyushu, Japan
3 h-index
3 publications
91 citations
University of Wisconsin–Madison
Madison, United States
3 h-index
4 publications
165 citations
1–8 of 104
12 publications · 670 citations
12
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10 publications · 538 citations
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6 publications · 144 citations
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3 publications · 67 citations
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Conference · 3 publications · 101 citations
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