Processor-in-the-loop Testing
Processor-In-The-Loop Testing is a validation methodology within embedded systems engineering that involves executing control algorithms on an actual physical processor while interfacing in real time with a simulated plant model, thereby enabling the assessment of processor-specific behaviors and timing characteristics under realistic operational conditions.
18
Publications
479
Citations
63
Authors
25
Institutions
Publications per year
2017–2026
10
Variants
Pil TestingProcessor-in-the-loop Simulation
Parents
18
1–5 of 18
63
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25

Imperial College London
London, United Kingdom
2 h-index
8 publications
96 citations
Université Sultan Moulay Slimane
Beni Mellal, Morocco
1 h-index
3 publications
60 citations

University of Sciences and Technology Houari Boumediene
Algiers, Algeria
1 h-index
2 publications
36 citations
University of South Carolina
Columbia, United States
1 h-index
5 publications
130 citations

University of Dallas
Irving, United States
1 h-index
1 publications
41 citations

China North Industries Group Corporation (China)
Beijing, China
1 h-index
1 publications
17 citations

National University of Defense Technology
Changsha, China
1 h-index
1 publications
16 citations

University of Algiers Benyoucef Benkhedda
Algiers, Algeria
1 h-index
2 publications
36 citations
1–8 of 25
1 publications · 41 citations
1
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1 publications · 34 citations
1
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1 publications · 20 citations
1
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1 publications · 45 citations
1
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1 publications · 19 citations
1
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1–5