Processor Peripheral Interfacing

Processor Peripheral Interfacing is a hardware-software integration methodology that enables communication between an embedded processor and external devices through standardized protocols and dedicated interface circuits, distinguishing itself by managing data, control, and timing coordination specific to peripheral operations.

11

Publications

300

Citations

29

Authors

7

Institutions

Publications per year

2017–2026

2

Authors

29

  1. HG
    Harvey G. Cragon

    The University of Texas at Austin, United States

    1 publications · 26 citations

    1

    h-index

  2. JN
    Jędrzej Nowak

    Gdańsk University of Technology, Poland

    1 publications · 11 citations

    1

    h-index

  3. NM
    Nick McKeown

    Stanford University, United States

    1 publications · 25 citations

    1

    h-index

  4. MF
    Matthew F. Slana

    1 publications · 18 citations

    1

    h-index

  5. MS
    Muhammad Shahbaz

    Stanford University, United States

    1 publications · 25 citations

    1

    h-index

1–5 of 29

Venues

  1. Bell System Technical Journal

    BSTJ · 2 publications · 29 citations

    2

    h-index

  2. Proceedings of the IEEE

    1 publications · 16 citations

    1

    h-index

  3. Euromicro Newsletter

    1 publications · 11 citations

    1

    h-index

  4. Journal of Robotics and Mechatronics

    1 publications · 11 citations

    1

    h-index

  5. Computer

    1 publications · 26 citations

    1

    h-index

1–5