Power-Down Modes is a low-power design technique that belongs to the class of power management strategies, distinguished by its deliberate transition of a digital circuit into a state of minimal or zero active operation to significantly reduce dynamic and leakage power consumption during periods of inactivity.
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Energy efficient prefetching and caching
Αθανάσιος Παπαθανασίου, Michael L. Scott · 2004 · 131 citations
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Seoul National University
Seoul, South Korea
5 h-index
8 publications
546 citations
Stanford University
Stanford, United States
2 h-index
2 publications
33 citations
Samsung (South Korea)
Seoul, South Korea
2 h-index
3 publications
59 citations
Renesas Electronics (Japan)
Tokyo, Japan
2 h-index
18 publications
212 citations
National Tsing Hua University
Hsinchu, Taiwan
2 h-index
6 publications
114 citations
Industrial Technology Research Institute
Hsinchu, Taiwan
2 h-index
5 publications
86 citations
Philips (Netherlands)
Amsterdam, The Netherlands
2 h-index
3 publications
200 citations
University of Kaiserslautern
Kaiserslautern, Germany
2 h-index
7 publications
92 citations
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- IEEE Journal of Solid-State Circuits
8 publications · 203 citations
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- European Solid-State Circuits Conference
Conference · 2 publications · 22 citations
2
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- Canadian Association of Radiologists Journal
CARJ · 1 publications · 56 citations
1
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- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
1 publications · 31 citations
1
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- Argentine School of Micro-Nanoelectronics, Technology and Applications
Conference · 1 publications · 11 citations
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