Concepedia

T. Kasaoka

TK

Statistics

Publications

2

Citations

22

H-Index

2

Active since

2004

Affiliations

Renesas Electronics (Japan)(Current)

T. Kasaoka is an author at Renesas Electronics (Japan) specializing in power-down modes, data retention, and low-power design.

Publications per year

2004–2005

2

Publications

2

A 312-MHz 16-Mb random-cycle embedded DRAM macro with a power-down data retention mode for mobile applications

Fukashi Morishita, Isamu Hayashi, Hiroshige MATSUOKA et al. · IEEE Journal of Solid-State Circuits · 2005 · 12 citations

, , +17

A 312MHz 16Mb random-cycle embedded DRAM macro with 73μW power-down mode for mobile applications

Fukashi Morishita, Isamu Hayashi, Hiroshige MATSUOKA et al. · 2004 · 10 citations

, , +17

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