Power-delay Tradeoff
Power-Delay Tradeoff is a performance optimization principle in standard cell design that characterizes the inverse relationship between a circuit's power consumption and its signal propagation delay, where reducing one typically necessitates an increase in the other.
397
Publications
18.4K
Citations
1.1K
Authors
354
Institutions
Publications per year
2017–2026
104
Variants
Power-delay Trade-off
Parents
397
Ning Zhu, Wang Ling Goh, W ZHANG et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2009 · 377 citations · Full text
Engineering, Computer Engineering, Electrical Engineering +15
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354
Tsinghua University
Beijing, China
17 h-index
45 publications
2.4K citations
Shahid Beheshti University
Tehran, Iran
13 h-index
33 publications
935 citations
Nanyang Technological University
Singapore, Singapore
12 h-index
37 publications
4.1K citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
10 h-index
48 publications
1.3K citations
Northeastern University
Boston, United States
9 h-index
12 publications
1.1K citations
University of Siena
Siena, Italy
8 h-index
11 publications
649 citations
IBM (United States)
Armonk, United States
8 h-index
31 publications
934 citations
Islamic Azad University, Science and Research Branch
Tehran, Iran
8 h-index
10 publications
327 citations
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23 publications · 2K citations
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16 publications · 2K citations
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12 publications · 657 citations
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12 publications · 651 citations
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12 publications · 404 citations
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