Power-analysis Resistance

Power-Analysis Resistance is a security property in logic locking that denotes the ability of a protected circuit to resist key extraction or functional reverse-engineering through differential power analysis by minimizing observable variations in power consumption across different input patterns and operational states.

24

Publications

818

Citations

86

Authors

42

Institutions

Publications per year

2017–2026

4

Authors

86

  1. FS
    François‐Xavier Standaert

    UCLouvain, Belgium

    2 publications · 101 citations

    2

    h-index

  2. IV
    Ingrid Verbauwhede

    KU Leuven, Belgium

    2 publications · 179 citations

    2

    h-index

  3. JL
    Jean-Didier Legat

    UCLouvain, Belgium

    1 publications · 57 citations

    1

    h-index

  4. EA
    Estuardo Alpírez Bock

    Eindhoven University of Technology, Netherlands

    1 publications · 16 citations

    1

    h-index

  5. SS
    Saket Srivastava

    University of Lincoln, United Kingdom

    1 publications · 106 citations

    1

    h-index

1–5 of 86

Venues

  1. 2

    h-index

  2. IACR Cryptology ePrint Archive

    Repository · 1 publications · 35 citations

    1

    h-index

  3. 1

    h-index

  4. IEEE Transactions on Industrial Electronics

    1 publications · 78 citations

    1

    h-index

  5. The Computer Journal

    1 publications · 27 citations

    1

    h-index

1–5