Partitioning Synthesis
Partitioning Synthesis is a formal methodology within hardware-software co-design that systematically decomposes a computational task into distinct hardware and software components based on optimization criteria such as performance, cost, and power consumption.
35
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999
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100
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42
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2017–2026
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Scheduling designs into a time-multiplexed FPGA
Steve Trimberger · 1998 · 103 citations · Full text
Engineering, Computer Engineering, Computer Architecture +16
V. Srinivasan, S. Govindarajan, Ranga Vemuri · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2001 · 53 citations
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University of Cincinnati
Cincinnati, United States
5 h-index
12 publications
376 citations

Linköping University
Linköping, Sweden
2 h-index
2 publications
60 citations
Cadence Design Systems (United States)
San Jose, United States
1 h-index
1 publications
53 citations

Pacific Northwest National Laboratory
Richland, United States
1 h-index
1 publications
27 citations
Intel (United States)
Santa Clara, United States
1 h-index
1 publications
53 citations
Eindhoven University of Technology
Eindhoven, The Netherlands
1 h-index
3 publications
195 citations
Technische Universität Braunschweig
Braunschweig, Germany
1 h-index
4 publications
176 citations
University of California, Davis
Davis, United States
1 h-index
1 publications
14 citations
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2 publications · 37 citations
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2 publications · 81 citations
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1 publications · 14 citations
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1 publications · 17 citations
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1 publications · 46 citations
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