Parity Generation
Parity Generation is a combinational logic function that belongs to the class of error-detection mechanisms, specifically defined as the process of computing a binary output bit such that the total number of 1s in a given data word and the parity bit together satisfies a predetermined even or odd condition.
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Jadav Chandra Das, Debashis De · Frontiers of Information Technology & Electronic Engineering · 2016 · 82 citations · Full text
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University of Illinois Urbana-Champaign
Urbana, United States
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5 publications
306 citations
University of Oxford
Oxford, United Kingdom
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3 publications
44 citations
Intel (United States)
Santa Clara, United States
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332 citations
National Institute of Technology Durgapur
Durgapur, India
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72 citations
University of Geneva
Geneva, Switzerland
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Kharazmi University
Tehran, Iran
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Islamic Azad University of Tabriz
Tabriz, Iran
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56 citations
Dehradun Institute of Technology University
Dehra Dūn, India
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Repository · 2 publications · 30 citations
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PRL · 2 publications · 63 citations
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