Parameterized Hardware Generation
Parameterized Hardware Generation is a hardware design methodology within FPGA programming models that enables the systematic instantiation of configurable, reusable circuit architectures through user-defined parameters, distinguishing it from fixed or ad-hoc design approaches by its emphasis on parameter-driven customization and structural scalability.
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Publications
238
Citations
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Authors
6
Institutions
Publications per year
2017–2026
2
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8
Characterization and parameterized random generation of digital circuits
Michael Hutton, J.P. Grossman, Jonathan Rose et al. · 1996 · 55 citations · Full text
Engineering, Computer Engineering, Electrical Engineering +16
Characterization and parameterized generation of synthetic combinational benchmark circuits
Mike Hutton, Jonathan Rose, J.P. Grossman et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1998 · 55 citations
Engineering, Computer Engineering, Electrical Engineering +15
Flexible FPGA design for FDTD using OpenCL
Tobias Kenter, Jens Förstner, Christian Plessl · 2017 · 24 citations
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University of Toronto
Toronto, Canada
4 h-index
13 publications
547 citations

University of Kragujevac
Kragujevac, Serbia
1 h-index
1 publications
18 citations
Center for Health, Exercise and Sport Sciences
Belgrade, Serbia
1 h-index
1 publications
18 citations
Palo Alto Research Center
Palo Alto, United States
1 h-index
3 publications
30 citations
Altera (United States)
San Jose, United States
1 h-index
1 publications
55 citations

Paderborn University
Paderborn, Germany
1 h-index
3 publications
72 citations
1–6 of 6
Conference · 1 publications · 10 citations
1
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Conference · 1 publications · 23 citations
1
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1 publications · 55 citations
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