Parameterized Hardware Generation

Parameterized Hardware Generation is a hardware design methodology within FPGA programming models that enables the systematic instantiation of configurable, reusable circuit architectures through user-defined parameters, distinguishing it from fixed or ad-hoc design approaches by its emphasis on parameter-driven customization and structural scalability.

8

Publications

238

Citations

16

Authors

6

Institutions

Publications per year

2017–2026

2

Authors

16

  1. JR
    Jonathan Rose

    University of Toronto, Canada

    4 publications · 164 citations

    4

    h-index

  2. JG
    J.P. Grossman

    D. E. Shaw Research, United States

    3 publications · 133 citations

    3

    h-index

  3. DG
    Derek G. Corneil

    University of Toronto, Canada

    3 publications · 141 citations

    3

    h-index

  4. MH
    Mike Hutton

    Altera (United States), United States

    2 publications · 78 citations

    2

    h-index

  5. MH
    Michael Hutton

    University of Toronto, Canada

    2 publications · 86 citations

    2

    h-index

1–5 of 16

Venues

  1. Design Automation Conference

    Conference · 1 publications · 10 citations

    1

    h-index

  2. 33rd Design Automation Conference Proceedings, 1996

    Conference · 1 publications · 23 citations

    1

    h-index

  3. 1

    h-index

1–3