On-chip Binning
On-Chip Binning is a charge integration technique in charge-coupled devices where photogenerated electrons from adjacent pixels are combined within the sensor's readout register before amplification, thereby increasing signal-to-noise ratio at the expense of spatial resolution.
7
Publications
220
Citations
50
Authors
12
Institutions
Publications per year
2017–2026
1
Parents
7
1–5 of 7
50
1
h-index
1
h-index
1
h-index
1
h-index
1
h-index
1–5 of 50
12
The University of Osaka
Osaka, Japan
1 h-index
3 publications
30 citations
University of Wisconsin–Madison
Madison, United States
1 h-index
4 publications
196 citations
UCLouvain
Louvain-la-Neuve, Belgium
1 h-index
4 publications
276 citations
Utrecht University
Utrecht, The Netherlands
1 h-index
2 publications
38 citations
Hamamatsu Photonics (Japan)
Hamamatsu, Japan
1 h-index
1 publications
10 citations
Arcetri Astrophysical Observatory
Florence, Italy
1 h-index
16 publications
368 citations

The Open University
Milton Keynes, United Kingdom
1 h-index
7 publications
77 citations

Leibniz Institute for Astrophysics Potsdam
Potsdam, Germany
1 h-index
1 publications
23 citations
1–8 of 12
1 publications · 11 citations
1
h-index
1 publications · 49 citations
1
h-index
1 publications · 23 citations
1
h-index
1 publications · 19 citations
1
h-index
JJAP · 1 publications · 10 citations
1
h-index
1–5