Multi-voltage Testability

Multi-Voltage Testability is a verification framework that enables the assessment of fault detection and diagnosis capabilities in multi-voltage designs by accounting for voltage-aware test generation, level shifting, and power-state-dependent observability and controllability.

1

Publications

17

Citations

5

Authors

1

Institutions

Publications per year

2017–2026

0

Authors

5

  1. JS
    Jeremy Sage

    MIT Lincoln Laboratory, United States

    1 publications · 17 citations

    1

    h-index

  2. VC
    Vivek Chickermane

    Cadence Design Systems (United States), United States

    1 publications · 17 citations

    1

    h-index

  3. PG
    Patrick Gallagher

    Lawrence Berkeley National Laboratory, United States

    1 publications · 17 citations

    1

    h-index

  4. PY
    Peng Yuan

    Houston Methodist, United States

    1 publications · 17 citations

    1

    h-index

  5. KC
    Krishna Chakravadhanula

    Cadence Design Systems (United States), United States

    1 publications · 17 citations

    1

    h-index

1–5 of 5

Institutions

1

  1. Cadence Design Systems (United States)

    San Jose, United States

    1 h-index

    5 publications

    85 citations

1–1 of 1