Metastability Delay Modeling
Metastability Delay Modeling is a formal analytical framework within delay modeling that characterizes the uncertainty in signal transition timing caused by metastable states in digital circuits, distinguishing itself by specifically accounting for the probabilistic resolution dynamics of flip-flops and latches operating beyond their specified setup and hold time constraints.
21
Publications
843
Citations
54
Authors
23
Institutions
Publications per year
2017–2026
3
Parents
21
Synchronizer Behavior and Analysis
Ian W. Jones, Suwen Yang, Mark R. Greenstreet · 2009 · 34 citations
Engineering, Computer Engineering, Electrical Engineering +15
1–5 of 21
54
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23
Technion – Israel Institute of Technology
Haifa, Israel
2 h-index
3 publications
168 citations
Lakehead University
Thunder Bay, Canada
2 h-index
2 publications
32 citations
Stanford University
Stanford, United States
2 h-index
4 publications
57 citations

Newcastle University
Newcastle upon Tyne, United Kingdom
2 h-index
7 publications
192 citations

Indian Institute of Technology Bombay
Mumbai, India
2 h-index
4 publications
54 citations
Toronto Metropolitan University
Toronto, Canada
2 h-index
4 publications
64 citations

University of Rochester
Rochester, United States
2 h-index
3 publications
52 citations
Blendics (United States)
St Louis, United States
1 h-index
3 publications
30 citations
1–8 of 23
2 publications · 79 citations
2
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2 publications · 357 citations
2
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2 publications · 38 citations
2
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1 publications · 21 citations
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Conference · 1 publications · 12 citations
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1–5