Memory Interconnects
Memory Interconnects is a subsystem architecture that mediates data transfer between processing units and memory hierarchies by providing dedicated communication pathways optimized for latency, bandwidth, and energy efficiency in parallel computing systems.
281
Publications
15.6K
Citations
1.1K
Authors
279
Institutions
Publications per year
2017–2026
48
Parents
281
Sorting networks and their applications
Kenneth E. Batcher · 1968 · 2.4K citations
A Survey of Interconnection Networks
Tse-Yun Feng · Computer · 1981 · 796 citations
Rajeev Balasubramonian, Andrew B. Kahng, Naveen Muralimanohar et al. · ACM Transactions on Architecture and Code Optimization · 2017 · 519 citations
1–5 of 281
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Korea Advanced Institute of Science and Technology
Daejeon, South Korea
9 h-index
24 publications
689 citations
Intel (United States)
Santa Clara, United States
9 h-index
33 publications
3K citations
University of California, Los Angeles
Los Angeles, United States
9 h-index
26 publications
821 citations
IBM (United States)
Armonk, United States
8 h-index
65 publications
5K citations
Hewlett-Packard (United States)
Palo Alto, United States
6 h-index
11 publications
983 citations

University of Toronto
Toronto, Canada
6 h-index
15 publications
872 citations
NEC (Japan)
Tokyo, Japan
6 h-index
41 publications
847 citations
University of Illinois Urbana-Champaign
Urbana, United States
5 h-index
13 publications
1K citations
1–8 of 279
13 publications · 1.3K citations
11
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8 publications · 258 citations
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8 publications · 1.4K citations
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8 publications · 536 citations
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Repository · 6 publications · 108 citations
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