Memory Interconnects

Memory Interconnects is a subsystem architecture that mediates data transfer between processing units and memory hierarchies by providing dedicated communication pathways optimized for latency, bandwidth, and energy efficiency in parallel computing systems.

281

Publications

15.6K

Citations

1.1K

Authors

279

Institutions

Publications per year

2017–2026

48

Authors

1.1K

  1. LB
    Luca Benini

    University of Bologna, Italy

    5 publications · 112 citations

    5

    h-index

  2. MV
    Mateo Valero

    Universitat Politècnica de Catalunya, Spain

    4 publications · 182 citations

    4

    h-index

  3. NS
    Nam Sung Kim

    University of Illinois Urbana-Champaign, United States

    4 publications · 372 citations

    4

    h-index

  4. JC
    Jason Cong

    University of California, Los Angeles, United States

    4 publications · 78 citations

    4

    h-index

  5. KB
    Keren Bergman

    Columbia University, United States

    4 publications · 70 citations

    4

    h-index

1–5 of 1.1K

Venues

  1. IEEE Transactions on Computers

    13 publications · 1.3K citations

    11

    h-index

  2. IEEE Journal of Solid-State Circuits

    8 publications · 258 citations

    8

    h-index

  3. Computer

    8 publications · 1.4K citations

    8

    h-index

  4. IEEE Micro

    8 publications · 536 citations

    8

    h-index

  5. arXiv (Cornell University)

    Repository · 6 publications · 108 citations

    6

    h-index

1–5