Memory Compiler

A Memory Compiler is a software tool that generates customized memory array layouts and associated netlists for integrated circuit design, distinguished by its ability to automatically produce area-, power-, and performance-optimized embedded memory instances according to user-specified parameters such as size, aspect ratio, and access timing.

150

Publications

7.4K

Citations

408

Authors

114

Institutions

Publications per year

2017–2026

20

Authors

408

  1. MK
    Mahmut Kandemir

    Pennsylvania State University, United States

    11 publications · 652 citations

    11

    h-index

  2. NV
    N. Vijaykrishnan

    Pennsylvania State University, United States

    5 publications · 381 citations

    5

    h-index

  3. RB
    Rajeev Barua

    University of Maryland, College Park, United States

    5 publications · 305 citations

    5

    h-index

  4. MI
    M.J. Irwin

    Pennsylvania State University, United States

    4 publications · 87 citations

    4

    h-index

  5. JT
    Josep Torrellas

    University of Illinois Urbana-Champaign, United States

    4 publications · 125 citations

    4

    h-index

1–5 of 408

Venues

  1. ACM SIGPLAN Notices

    8 publications · 727 citations

    8

    h-index

  2. IEEE Journal of Solid-State Circuits

    4 publications · 135 citations

    4

    h-index

  3. ACM Transactions on Embedded Computing Systems

    TECS · 3 publications · 120 citations

    3

    h-index

  4. 3

    h-index

  5. Journal of Embedded Computing

    2 publications · 172 citations

    2

    h-index

1–5