Macro Placement

Macro Placement is a physical design task that involves determining the optimal positions of large functional blocks within a chip layout to minimize interconnect length and congestion while adhering to design constraints.

114

Publications

4.9K

Citations

267

Authors

85

Institutions

Publications per year

2017–2026

16

Authors

267

  1. YC
    Yao‐Wen Chang

    National Taiwan University, Taiwan

    16 publications · 873 citations

    15

    h-index

  2. IL
    Igor L. Markov

    University of Michigan, United States

    9 publications · 677 citations

    9

    h-index

  3. TC
    Tung-Chieh Chen

    National Taiwan University, Taiwan

    8 publications · 561 citations

    8

    h-index

  4. JA
    Jarrod A. Roy

    University of Michigan, United States

    6 publications · 413 citations

    6

    h-index

  5. CS
    Carl Sechen

    University of Washington, United States

    5 publications · 368 citations

    5

    h-index

1–5 of 267

Venues

  1. 12

    h-index

  2. 3

    h-index

  3. ACM Transactions on Design Automation of Electronic Systems

    TODAES · 3 publications · 259 citations

    3

    h-index

  4. Design Automation Conference

    Conference · 2 publications · 62 citations

    2

    h-index

  5. International Conference on Computer Aided Design

    Conference · 2 publications · 79 citations

    2

    h-index

1–5