Issue Width

Issue Width is the maximum number of instructions that a processor can issue per clock cycle, distinguishing it from other microarchitectural metrics by quantifying the degree of parallel instruction initiation supported by the execution pipeline.

52

Publications

4.4K

Citations

99

Authors

37

Institutions

Publications per year

2017–2026

0

Variants

Instruction Issue Width

Authors

99

  1. AG
    Antonio González

    Universitat Politècnica de Catalunya, Spain

    7 publications · 746 citations

    7

    h-index

  2. JE
    James E. Smith

    University of Wisconsin–Madison, United States

    5 publications · 1.4K citations

    5

    h-index

  3. MV
    Mateo Valero

    Universitat Politècnica de Catalunya, Spain

    5 publications · 666 citations

    5

    h-index

  4. NP
    Norman P. Jouppi

    Hewlett-Packard (United States), United States

    4 publications · 1.2K citations

    4

    h-index

  5. JA
    Joseph A. Fisher

    Hewlett-Packard (United States), United States

    3 publications · 559 citations

    3

    h-index

1–5 of 99

Venues

  1. ACM SIGARCH Computer Architecture News

    5 publications · 345 citations

    5

    h-index

  2. Minds at UW (University of Wisconsin)

    Repository · 3 publications · 627 citations

    3

    h-index

  3. IEEE Transactions on Computers

    3 publications · 143 citations

    3

    h-index

  4. Proceedings. 24th EUROMICRO Conference (Cat. No.98EX204)

    Conference · 1 publications · 11 citations

    1

    h-index

  5. Design, Automation, and Test in Europe

    Conference · 1 publications · 16 citations

    1

    h-index

1–5