Interrupt Architecture
Interrupt Architecture is a microcontroller subsystem design that enables the prioritized handling of asynchronous events by defining the mechanisms for interrupt source identification, vectoring to service routines, and context preservation during normal program execution flow.
47
Publications
2.9K
Citations
147
Authors
57
Institutions
Publications per year
2017–2026
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Brent Chun, David Culler, Timothy Roscoe et al. · ACM SIGCOMM Computer Communication Review · 2003 · 1K citations
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Khalifa University of Science and Technology, United Arab Emirates
3 publications · 101 citations
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Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
2 publications · 32 citations
2
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King Fahd University of Petroleum and Minerals
Dhahran, Saudi Arabia
3 h-index
7 publications
244 citations
University of Wisconsin–Madison
Madison, United States
3 h-index
6 publications
1.1K citations
Yale University
New Haven, United States
2 h-index
2 publications
123 citations
Tsinghua University
Beijing, China
2 h-index
2 publications
123 citations
University of Science and Technology of China
Hefei, China
2 h-index
2 publications
123 citations
Toyota Technological Institute at Chicago
Chicago, United States
2 h-index
2 publications
123 citations
North Carolina State University
Raleigh, United States
2 h-index
7 publications
74 citations
Princeton University
Princeton, United States
2 h-index
4 publications
3.1K citations
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3 publications · 129 citations
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3 publications · 305 citations
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2 publications · 29 citations
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2 publications · 84 citations
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1 publications · 15 citations
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