Interrupt Architecture

Interrupt Architecture is a microcontroller subsystem design that enables the prioritized handling of asynchronous events by defining the mechanisms for interrupt source identification, vectoring to service routines, and context preservation during normal program execution flow.

47

Publications

2.9K

Citations

147

Authors

57

Institutions

Publications per year

2017–2026

1

Authors

147

  1. JE
    James E. Smith

    University of Wisconsin–Madison, United States

    3 publications · 563 citations

    3

    h-index

  2. AR
    Andrew R. Pleszkun

    University of Colorado Boulder, United States

    3 publications · 563 citations

    3

    h-index

  3. KS
    Khaled Salah

    Khalifa University of Science and Technology, United Arab Emirates

    3 publications · 101 citations

    3

    h-index

  4. XF
    Xinyu Feng

    University of Science and Technology of China, China

    2 publications · 123 citations

    2

    h-index

  5. WS
    Wolfgang Schröder‐Preikschat

    Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany

    2 publications · 32 citations

    2

    h-index

1–5 of 147

Venues

  1. ACM SIGARCH Computer Architecture News

    3 publications · 129 citations

    3

    h-index

  2. IEEE Transactions on Computers

    3 publications · 305 citations

    3

    h-index

  3. ACM SIGOPS Operating Systems Review

    2 publications · 29 citations

    2

    h-index

  4. Computer Communications

    2 publications · 84 citations

    2

    h-index

  5. Review of Scientific Instruments

    1 publications · 15 citations

    1

    h-index

1–5