Interface Verification

Interface Verification is a formal method within the domain of system and software verification that specifically ensures the correctness, consistency, and compliance of interactions between interconnected components by rigorously validating their shared interfaces against defined behavioral, structural, and contractual specifications.

112

Publications

6.1K

Citations

253

Authors

102

Institutions

Publications per year

2017–2026

10

Authors

253

  1. TB
    Tevfik Bultan

    University of California, Santa Barbara, United States

    8 publications · 181 citations

    8

    h-index

  2. TA
    Thomas A. Henzinger

    University of California, Berkeley, United States

    6 publications · 1.7K citations

    6

    h-index

  3. AB
    Aysu Betin-Can

    Middle East Technical University, Türkiye

    5 publications · 137 citations

    5

    h-index

  4. CF
    Cormac Flanagan

    University of California, Santa Cruz, United States

    5 publications · 494 citations

    5

    h-index

  5. AS
    Alberto Sangiovanni‐Vincentelli

    University of California, Berkeley, United States

    5 publications · 562 citations

    5

    h-index

1–5 of 253

Venues

  1. IEEE Transactions on Software Engineering

    TSE · 4 publications · 123 citations

    4

    h-index

  2. Electronic Notes in Theoretical Computer Science

    ENTCS · 4 publications · 98 citations

    4

    h-index

  3. 3

    h-index

  4. Formal Methods in System Design

    2 publications · 23 citations

    2

    h-index

  5. Programming and Computer Software

    2 publications · 26 citations

    2

    h-index

1–5