Interconnect Congestion Analysis

Interconnect Congestion Analysis is a computational method in electronic design automation that identifies and quantifies routing resource overutilization in integrated circuit interconnects to predict and mitigate performance degradation during physical synthesis.

Publications

1.7K

Citations

161

Authors

Institutions

Publications per year

2017–2026

Parents

Interconnect Design

Publications

Estimating routing congestion using probabilistic analysis

Jinan Lou, Shankar Krishnamoorthy, Henry Sheng · 2001 · 142 citations

Computing, Computer Engineering, Interconnection Networks +15

Estimating routing congestion using probabilistic analysis

Jinan Lou, S. Thakur, Shankar Krishnamoorthy et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2002 · 137 citations

Computing, Computer Engineering, Interconnection Networks +15

The DAC 2012 routability-driven placement contest and benchmark suite

Charles J. Alpert, Cliff Sze, Zhuo Li et al. · 2012 · 103 citations

Management, Design, Design Optimization +10

NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs

Meng-Kai Hsu, Yifang Chen, Chau-Chin Huang et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2014 · 94 citations

Engineering, Computer Engineering, Electrical Engineering +16

An effective congestion-driven placement framework

Ulrich Brenner, André Rohe · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2003 · 88 citations

Engineering, Computer Engineering, Computer Architecture +16

1–5 of 50

Authors

161

YC
Yao‐Wen Chang
National Taiwan University, Taiwan
3 publications · 152 citations
3
h-index
MS
Majid Sarrafzadeh
University of California, Los Angeles, United States
3 publications · 127 citations
3
h-index
DP
Davide Pandini
STMicroelectronics (Italy), Italy
3 publications · 51 citations
3
h-index
AJ
Andrzej J. Strojwas
Carnegie Mellon University, United States
3 publications · 51 citations
3
h-index
JL
Jinan Lou
University of Southern California, United States
2 publications · 279 citations
2
h-index

1–5 of 161

Institutions

1–8 of 68

Venues

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
10 publications · 502 citations
10
h-index
2022 IEEE Symposium on Security and Privacy (SP)
Conference · 1 publications · 24 citations
1
h-index
IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing
1 publications · 11 citations
1
h-index
ACM Transactions on Design Automation of Electronic Systems
TODAES · 1 publications · 21 citations
1
h-index
Applied Nanoscience
1 publications · 28 citations
1
h-index

1–5