Integration Verification

Integration Verification is a functional verification methodology that specifically ensures the correct interaction and interoperability of individually verified components when combined into a larger system, distinguishing it from unit-level or system-level verification approaches by focusing on interface consistency, data integrity, and behavioral coherence across integrated subsystems.

15

Publications

375

Citations

66

Authors

26

Institutions

Publications per year

2017–2026

4

Authors

66

  1. WE
    Wolfgang Ecker

    Infineon Technologies (Germany), Germany

    2 publications · 68 citations

    2

    h-index

  2. CT
    Cristian Tepus

    Center of Technology and Engineering for Nuclear Projects, Romania

    1 publications · 10 citations

    1

    h-index

  3. MP
    Matteo Pardini

    University of Genoa, Italy

    1 publications · 45 citations

    1

    h-index

  4. JH
    Jeongmoo Huh

    Korea Advanced Institute of Science and Technology, South Korea

    1 publications · 22 citations

    1

    h-index

  5. SL
    Steffen Landgraf

    Humboldt-Universität zu Berlin, Germany

    1 publications · 45 citations

    1

    h-index

1–5 of 66

Venues

  1. arXiv (Cornell University)

    Repository · 1 publications · 24 citations

    1

    h-index

  2. IEEE Access

    1 publications · 12 citations

    1

    h-index

  3. Neuroreport

    1 publications · 45 citations

    1

    h-index

  4. KTH Publication Database DiVA (KTH Royal Institute of Technology)

    Repository · 1 publications · 45 citations

    1

    h-index

  5. Journal of Logic and Computation

    1 publications · 22 citations

    1

    h-index

1–5