Hardware Tessellation
Hardware Tessellation is a graphics processing technique that belongs to the class of geometric subdivision methods, distinguished by its implementation in dedicated GPU hardware to dynamically refine coarse polygon meshes into finer geometric detail during rendering.
25
Publications
622
Citations
57
Authors
26
Institutions
Publications per year
2017–2026
3
Parents
25
Editable polycube map for GPU-based subdivision surfaces
Jiazhil Xia, Ismael Gutiérrez García, Ying He et al. · 2011 · 51 citations
Watertight tessellation using forward differencing
Henry Moreton · 2001 · 49 citations
1–5 of 25
57
7
h-index
5
h-index
Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
4 publications · 74 citations
4
h-index
Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
3 publications · 64 citations
3
h-index
Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
3 publications · 64 citations
3
h-index
1–5 of 57
26
Friedrich-Alexander-Universität Erlangen-Nürnberg
Erlangen, Germany
7 h-index
18 publications
336 citations
Microsoft (United States)
Redmond, United States
4 h-index
4 publications
110 citations
Microsoft Research (United Kingdom)
Cambridge, United Kingdom
4 h-index
4 publications
179 citations
ETH Zurich
Zurich, Switzerland
1 h-index
2 publications
76 citations
Intel (United States)
Santa Clara, United States
1 h-index
2 publications
36 citations
Nvidia (United States)
Santa Clara, United States
1 h-index
1 publications
49 citations
Nanyang Technological University
Singapore, Singapore
1 h-index
3 publications
153 citations
Stanford University
Stanford, United States
1 h-index
2 publications
64 citations
1–8 of 26
4 publications · 73 citations
4
h-index
TOG · 3 publications · 149 citations
3
h-index
TVCG · 1 publications · 10 citations
1
h-index
1 publications · 13 citations
1
h-index
1 publications · 38 citations
1
h-index
1–5