Hardware Scheduling is a computational process that allocates and sequences hardware resources over time to execute tasks efficiently, distinguished by its focus on managing physical devices and execution timing in heterogeneous computing environments.
396
Publications
15.4K
Citations
1.1K
Authors
348
Institutions
Publications per year
2017–2026
71
Parents
Publications
396
1–5 of 396
Authors
1.1K
- AG
7
h-index
- LT
6
h-index
- SM
5
h-index
- AS
4
h-index
- ZG
4
h-index
1–5 of 1.1K
Institutions
348
University of California, Berkeley
Berkeley, United States
12 h-index
42 publications
1.7K citations
Universitat Politècnica de Catalunya
Barcelona, Spain
11 h-index
34 publications
1.5K citations
University of Michigan
Ann Arbor, United States
11 h-index
30 publications
1.3K citations
Intel (United States)
Santa Clara, United States
10 h-index
27 publications
1.1K citations
University of Wisconsin–Madison
Madison, United States
10 h-index
22 publications
672 citations
University of California, Irvine
Irvine, United States
9 h-index
26 publications
677 citations
Princeton University
Princeton, United States
9 h-index
16 publications
806 citations
Hewlett-Packard (United States)
Palo Alto, United States
8 h-index
12 publications
484 citations
1–8 of 348
Venues
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
9 publications · 346 citations
9
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- IEEE Transactions on Parallel and Distributed Systems
TPDS · 8 publications · 273 citations
8
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- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
8 publications · 431 citations
8
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- IEEE Transactions on Computers
6 publications · 131 citations
6
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- ACM SIGARCH Computer Architecture News
6 publications · 395 citations
6
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1–5