Frame Buffer Architecture

Frame Buffer Architecture is a computer graphics hardware subsystem that, as distinguished from other memory architectures, manages the storage and retrieval of pixel data in a dedicated buffer organized for direct access by display and rendering systems to enable real-time image synthesis and screen refresh.

153

Publications

7.5K

Citations

477

Authors

139

Institutions

Publications per year

2017–2026

7

Authors

477

  1. HF
    Henry Fuchs

    University of North Carolina at Chapel Hill, United States

    6 publications · 598 citations

    6

    h-index

  2. AK
    Arie Kaufman

    Stony Brook University, United States

    5 publications · 505 citations

    5

    h-index

  3. SG
    Satish Gupta

    Carnegie Mellon University, United States

    4 publications · 101 citations

    4

    h-index

  4. JE
    John Eyles

    University of North Carolina at Chapel Hill, United States

    4 publications · 540 citations

    4

    h-index

  5. DE
    David Ellsworth

    Ames Research Center, United States

    4 publications · 555 citations

    4

    h-index

1–5 of 477

Venues

  1. ACM SIGGRAPH Computer Graphics

    12 publications · 1.1K citations

    12

    h-index

  2. IEEE Computer Graphics and Applications

    12 publications · 567 citations

    11

    h-index

  3. 6

    h-index

  4. IEEE Journal of Solid-State Circuits

    5 publications · 73 citations

    5

    h-index

  5. IEEE Transactions on Consumer Electronics

    5 publications · 132 citations

    5

    h-index

1–5