Flip-flop Integration
Flip-Flop Integration is a methodological construct within the architecture of Field-Programmable Gate Arrays that embeds flip-flops directly into configurable logic blocks to enhance timing performance and resource utilization by enabling efficient synchronization within programmable logic fabrics.
44
Publications
1.7K
Citations
166
Authors
52
Institutions
Publications per year
2017–2026
7
44
Brian R. Gaines · 1967 · 249 citations
Semi-dynamic and dynamic flip-flops with embedded logic
F. Klass · 2002 · 151 citations
Engineering, Computer Engineering, Electrical Engineering +12
Automatic water level sensor and controller system
Beza Negash Getu, Hussain Attia · 2016 · 64 citations
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52
Aristotle University of Thessaloniki
Thessaloniki, Greece
3 h-index
15 publications
335 citations
NTT (Japan)
Tokyo, Japan
3 h-index
12 publications
318 citations
Nanyang Technological University
Singapore, Singapore
2 h-index
14 publications
202 citations
AT&T (United States)
Bedminster, United States
2 h-index
2 publications
92 citations
Eindhoven University of Technology
Eindhoven, The Netherlands
2 h-index
7 publications
319 citations
Carnegie Mellon University
Pittsburgh, United States
1 h-index
2 publications
64 citations
Stanford University
Stanford, United States
1 h-index
7 publications
1.7K citations
HRL Laboratories (United States)
Malibu, United States
1 h-index
5 publications
50 citations
1–8 of 52
4 publications · 159 citations
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2 publications · 51 citations
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IPTEL · 2 publications · 36 citations
2
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2 publications · 66 citations
2
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1 publications · 19 citations
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