Field-programmable Gate Array Prototyping

Field-Programmable Gate Array Prototyping is a hardware design methodology that employs reconfigurable field-programmable gate arrays to emulate and validate the functionality of application-specific integrated circuits prior to fabrication, enabling rapid iteration and verification of digital system architectures.

142

Publications

6.7K

Citations

523

Authors

186

Institutions

Publications per year

2017–2026

29

Authors

523

  1. TS
    Tyson S. Hall

    Georgia Institute of Technology, United States

    3 publications · 189 citations

    3

    h-index

  2. AA
    Amit Acharyya

    Indian Institute of Technology Hyderabad, India

    3 publications · 108 citations

    3

    h-index

  3. DV
    David V. Anderson

    Georgia Institute of Technology, United States

    3 publications · 189 citations

    3

    h-index

  4. PG
    P.G. Gulak

    University of Toronto, Canada

    3 publications · 251 citations

    3

    h-index

  5. RW
    Remigiusz Wiśniewski

    University of Zielona Góra, Poland

    3 publications · 95 citations

    3

    h-index

1–5 of 523

Venues

  1. 5

    h-index

  2. IEEE Transactions on Industrial Electronics

    4 publications · 541 citations

    4

    h-index

  3. IEEE Transactions on Education

    4 publications · 94 citations

    4

    h-index

  4. IEEE Transactions on Industrial Informatics

    4 publications · 223 citations

    4

    h-index

  5. 3

    h-index

1–5