Failure Masking

Failure masking is a fault tolerance technique in parallel systems that belongs to the class of error处理 strategies, specifically characterized by its ability to conceal the occurrence of failures from higher-level processes through redundancy or error correction without disrupting system operation.

15

Publications

680

Citations

41

Authors

22

Institutions

Publications per year

2017–2026

1

Authors

41

  1. LS
    Lisa Spainhower

    IBM (United States), United States

    1 publications · 191 citations

    1

    h-index

  2. VA
    V.K. Agarwal

    McGill University, Canada

    1 publications · 38 citations

    1

    h-index

  3. JR
    J R Johnson

    University of Iowa, United States

    1 publications · 12 citations

    1

    h-index

  4. AR
    Andrew R. Conn

    IBM (United States), United States

    1 publications · 24 citations

    1

    h-index

  5. KT
    Keita Teranishi

    Sandia National Laboratories California, United States

    1 publications · 14 citations

    1

    h-index

1–5 of 41

Venues

  1. IEEE Transactions on Computers

    3 publications · 105 citations

    3

    h-index

  2. Scholar Works (Boise State University)

    Repository · 1 publications · 13 citations

    1

    h-index

  3. Journal of Electronic Testing

    JETTA · 1 publications · 38 citations

    1

    h-index

  4. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 1 publications · 14 citations

    1

    h-index

  5. IBM Journal of Research and Development

    1 publications · 191 citations

    1

    h-index

1–5