Differential Pair Design is a low-noise circuit design technique that employs a matched pair of transistors configured to amplify the difference between two input signals while rejecting common-mode noise and offset, thereby enhancing signal integrity and noise immunity in analog integrated circuits.
95
Publications
3K
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293
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123
Institutions
Publications per year
2017–2026
8
Parents
Publications
95
CMOS dynamic comparators for pipeline A/D converters
L. Sumanen, M. Waltari, V. Hakkarainen et al. · 2003 · 98 citations
Engineering, Computer Engineering, Electrical Engineering +17
1–5 of 95
Authors
293
- MS
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- JR
3
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- BN
2
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2
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2
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1–5 of 293
Institutions
123
KU Leuven
Leuven, Belgium
5 h-index
9 publications
450 citations
Georgia Institute of Technology
Atlanta, United States
4 h-index
14 publications
263 citations
University of Pavia
Pavia, Italy
3 h-index
3 publications
163 citations
Texas A&M University
College Station, United States
3 h-index
3 publications
372 citations
Chalmers University of Technology
Gothenburg, Sweden
3 h-index
5 publications
135 citations
University of Twente
Enschede, The Netherlands
3 h-index
7 publications
151 citations
Inha University
Incheon, South Korea
2 h-index
3 publications
74 citations
Infineon Technologies (Germany)
Munich, Germany
2 h-index
2 publications
37 citations
1–8 of 123
Venues
- Electronics Letters
11 publications · 284 citations
10
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- IEEE Journal of Solid-State Circuits
8 publications · 369 citations
8
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- IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing
4 publications · 297 citations
4
h-index
- IEEE Transactions on Circuits and Systems I Regular Papers
3 publications · 78 citations
3
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- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2 publications · 107 citations
2
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1–5