Counter Architecture
Counter Architecture is a microcontroller subsystem design that integrates dedicated hardware logic for incrementing, decrementing, and resetting a register-based value to enable precise timing, event counting, and control signal generation within embedded systems.
118
Publications
3.8K
Citations
310
Authors
124
Institutions
Publications per year
2017–2026
18
Parents
118
Yi Lu, Andrea Montanari, Balaji Prabhakar et al. · 2008 · 209 citations
A performance counter architecture for computing accurate CPI components
Stijn Eyerman, Lieven Eeckhout, Tejas S. Karkhanis et al. · 2006 · 189 citations
Earl E. Swartzlander · IEEE Transactions on Computers · 1973 · 144 citations
Engineering, Computer Engineering, Electrical Engineering +17
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Stanford University
Stanford, United States
8 h-index
23 publications
1.7K citations
University of Florida
Gainesville, United States
5 h-index
13 publications
419 citations
University of California San Diego
San Diego, United States
5 h-index
9 publications
340 citations

Ghent University Hospital
Ghent, Belgium
4 h-index
9 publications
533 citations
University of Wisconsin–Madison
Madison, United States
4 h-index
7 publications
464 citations
Georgia Institute of Technology
Atlanta, United States
4 h-index
7 publications
272 citations
University of Virginia
Charlottesville, United States
2 h-index
2 publications
90 citations
University of Pennsylvania
Philadelphia, United States
2 h-index
2 publications
39 citations
1–8 of 124
7 publications · 353 citations
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4 publications · 159 citations
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4 publications · 86 citations
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PER · 4 publications · 184 citations
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3 publications · 58 citations
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