Counter Architecture

Counter Architecture is a microcontroller subsystem design that integrates dedicated hardware logic for incrementing, decrementing, and resetting a register-based value to enable precise timing, event counting, and control signal generation within embedded systems.

118

Publications

3.8K

Citations

310

Authors

124

Institutions

Publications per year

2017–2026

18

Authors

310

  1. LE
    Lieven Eeckhout

    Ghent University, Belgium

    6 publications · 336 citations

    6

    h-index

  2. SE
    Stijn Eyerman

    Ghent University, Belgium

    6 publications · 336 citations

    6

    h-index

  3. BP
    Balaji Prabhakar

    Stanford University, United States

    6 publications · 393 citations

    6

    h-index

  4. YL
    Yi Lu

    University of Illinois Urbana-Champaign, United States

    5 publications · 360 citations

    5

    h-index

  5. TS
    Tejas S. Karkhanis

    University of Wisconsin–Madison, United States

    4 publications · 244 citations

    4

    h-index

1–5 of 310

Venues

  1. IEEE Transactions on Computers

    7 publications · 353 citations

    7

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  2. 4

    h-index

  3. Nuclear Instruments and Methods

    4 publications · 86 citations

    4

    h-index

  4. ACM SIGMETRICS Performance Evaluation Review

    PER · 4 publications · 184 citations

    4

    h-index

  5. 3

    h-index

1–5