Compilation For Parallel Architectures

Compilation for Parallel Architectures is a specialized compilation technique that transforms sequential programs into optimized parallel code by exploiting concurrency and mapping computations to parallel hardware structures such as multi-core processors, GPUs, or distributed systems.

357

Publications

22.5K

Citations

945

Authors

257

Institutions

Publications per year

2017–2026

16

Authors

945

  1. DP
    David Padua

    University of Illinois Urbana-Champaign, United States

    9 publications · 875 citations

    9

    h-index

  2. SA
    Saman Amarasinghe

    Massachusetts Institute of Technology, United States

    9 publications · 1.6K citations

    9

    h-index

  3. PS
    P. Sadayappan

    The Ohio State University, United States

    7 publications · 343 citations

    7

    h-index

  4. MJ
    Michael J. Quinn

    Oregon State University, United States

    6 publications · 193 citations

    6

    h-index

  5. VS
    Vivek Sarkar

    Rice University, United States

    6 publications · 989 citations

    6

    h-index

1–5 of 945

Venues

  1. ACM SIGPLAN Notices

    14 publications · 425 citations

    12

    h-index

  2. Computer

    10 publications · 1.7K citations

    10

    h-index

  3. ACM SIGARCH Computer Architecture News

    9 publications · 280 citations

    9

    h-index

  4. Journal of Parallel and Distributed Computing

    9 publications · 489 citations

    9

    h-index

  5. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 9 publications · 692 citations

    9

    h-index

1–5