Clock Network Synthesis

Clock Network Synthesis is a design methodology in integrated circuit physical design that systematically constructs a clock distribution network to achieve minimal skew, low jitter, and balanced latency across all sink points while optimizing for power, area, and manufacturability.

100

Publications

Citations

254

Authors

Institutions

Publications per year

2017–2026

Parents

Clock Distribution Networks

Publications

100

An exact zero-skew clock routing algorithm

Ren‐Song Tsay · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1993 · 235 citations

Engineering, Computer Engineering, Computer Science +17

Low-Power and Reliable Clock Network Design for Through-Silicon Via (TSV) Based 3D ICs

Xin Zhao, Jacob Rajkumar Minz, Sung Kyu Lim · IEEE Transactions on Components Packaging and Manufacturing Technology · 2010 · 86 citations

Engineering, Computer Engineering, Electrical Engineering +17

Statistical timing analysis driven post-silicon-tunable clock-tree synthesis

Jeng-Liang Tsai, Lizheng Zhang, Charlie Chung‐Ping Chen · International Conference on Computer Aided Design · 2005 · 82 citations

Engineering, Computer Engineering, Computer Science +16

ISPD 2010 high performance clock network synthesis contest

C. N. Sze · 2010 · 82 citations

Engineering, Computer Engineering, Electrical Engineering +17

Power-aware clock tree planning

Monica Donno, Enrico Macii, L. Mazzoni · 2004 · 79 citations

Engineering, Computer Engineering, Electrical Engineering +17

1–5 of 100

Authors

254

EG
Eby G. Friedman
University of Rochester, United States
6 publications · 212 citations
6
h-index
DZ
David Z. Pan
The University of Texas at Austin, United States
6 publications · 183 citations
6
h-index
TK
Tak-Yung Kim
Seoul National University, South Korea
5 publications · 168 citations
5
h-index
IL
Igor L. Markov
University of Michigan, United States
5 publications · 122 citations
5
h-index
SK
Sung Kyu Lim
Georgia Institute of Technology, United States
4 publications · 177 citations
4
h-index

1–5 of 254

Institutions

1–8 of 84

Venues

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
10 publications · 487 citations
10
h-index
International Conference on Computer Aided Design
Conference · 4 publications · 137 citations
4
h-index
ACM Transactions on Design Automation of Electronic Systems
TODAES · 3 publications · 80 citations
3
h-index
Asia and South Pacific Design Automation Conference
Conference · 3 publications · 107 citations
3
h-index
IEEE Transactions on Applied Superconductivity
2 publications · 79 citations
2
h-index

1–5