Channel Routing

Channel Routing is a specialized layout routing technique in Very-Large-Scale Integration (VLSI) design wherein signal interconnections between circuit components are routed through a narrow, linear region bounded by terminal rows, distinguished from other routing methods by its structured, channel-constrained topology and focus on minimizing track usage and via counts within the channel boundaries.

232

Publications

10.7K

Citations

442

Authors

165

Institutions

Publications per year

2017–2026

7

Authors

442

  1. MD
    Martin D. F. Wong

    University of Illinois Urbana-Champaign, United States

    10 publications · 280 citations

    10

    h-index

  2. AS
    Alberto Sangiovanni‐Vincentelli

    University of California, Berkeley, United States

    8 publications · 476 citations

    8

    h-index

  3. MS
    Majid Sarrafzadeh

    University of California, Los Angeles, United States

    8 publications · 347 citations

    8

    h-index

  4. RL
    Ronald L. Rivest

    Massachusetts Institute of Technology, United States

    6 publications · 589 citations

    6

    h-index

  5. NA
    Naveed A. Sherwani

    Western Michigan University, United States

    5 publications · 110 citations

    5

    h-index

1–5 of 442

Venues

  1. 28

    h-index

  2. Design Automation Conference

    Conference · 19 publications · 590 citations

    14

    h-index

  3. IEEE Transactions on Computers

    6 publications · 206 citations

    6

    h-index

  4. 20th Design Automation Conference Proceedings

    Conference · 4 publications · 131 citations

    4

    h-index

  5. Integration

    4 publications · 115 citations

    4

    h-index

1–5