Concepedia

Cache Associativity Optimization

Cache Associativity Optimization is a methodological approach in computer architecture that systematically determines and configures the optimal degree of set associativity in cache memories to minimize access latency and power consumption while maintaining cache effectiveness, distinguishing itself from general cache design techniques by specifically targeting the trade-off between associativity level and energy efficiency in low-power contexts.

32

Publications

1.4K

Citations

83

Authors

34

Institutions

Publications per year

2017–2026

2

Parents

Publications

32

The ZCache: Decoupling Ways and Associativity

Daniel Sánchez, Christos Kozyrakis · 2010 · 200 citations

, , +17

The V-Way Cache

Moinuddin K. Qureshi, David Thompson, Yale N. Patt · ACM SIGARCH Computer Architecture News · 2005 · 180 citations

, , +17

Precise miss analysis for program transformations with caches of arbitrary associativity

Somnath Ghosh, Margaret Martonosi, Sharad Malik · 1998 · 118 citations

, , +13

The V-Way Cache: Demand Based Associativity via Global Replacement

Moinuddin K. Qureshi, David Thompson, Yale N. Patt · 2005 · 99 citations

, , +17

A self-tuning cache architecture for embedded systems

Chuanjun Zhang, Frank Vahid, Roman Lysecky · ACM Transactions on Embedded Computing Systems · 2004 · 87 citations

, , +17

1–5 of 32

Authors

83

  1. CZ
    Chuanjun Zhang

    University of California, Riverside, United States

    3 publications · 175 citations

    3

    h-index

  2. MK
    Moinuddin K. Qureshi

    Georgia Institute of Technology, United States

    3 publications · 309 citations

    3

    h-index

  3. FV
    Frank Vahid

    University of California, Riverside, United States

    3 publications · 175 citations

    3

    h-index

  4. JB
    Jay Buckingham

    University of Edinburgh, United Kingdom

    2 publications · 67 citations

    2

    h-index

  5. AN
    Alex Nicolau

    University of California, Irvine, United States

    2 publications · 37 citations

    2

    h-index

1–5 of 83

Institutions

34

  1. Georgia Institute of Technology

    Atlanta, United States

    4 h-index

    7 publications

    190 citations

  2. University of Edinburgh

    Edinburgh, United Kingdom

    3 h-index

    4 publications

    136 citations

  3. University of California, Riverside

    Riverside, United States

    3 h-index

    8 publications

    502 citations

  4. University of California, Irvine

    Irvine, United States

    3 h-index

    5 publications

    130 citations

  5. The University of Texas at Austin

    Austin, United States

    2 h-index

    6 publications

    837 citations

  6. Institut national de recherche en sciences et technologies du numérique

    Le Chesnay-Rocquencourt, France

    2 h-index

    3 publications

    108 citations

  7. University of Toronto

    Toronto, Canada

    2 h-index

    5 publications

    284 citations

  8. Tamkang University

    Taipei, Taiwan

    2 h-index

    1 publications

    12 citations

1–8 of 34

Venues

  1. Network Computation in Neural Systems

    2 publications · 67 citations

    2

    h-index

  2. Design, Automation, and Test in Europe

    Conference · 2 publications · 78 citations

    2

    h-index

  3. ACM Transactions on Embedded Computing Systems

    TECS · 1 publications · 87 citations

    1

    h-index

  4. IEEE Transactions on Multimedia

    1 publications · 28 citations

    1

    h-index

  5. 1

    h-index

1–5