Bypass Networks

Bypass Networks is a hardware optimization mechanism in out-of-order execution processors that belongs to the class of data forwarding techniques, distinguished by its ability to dynamically route operand values directly from pipeline stages or reservation stations to functional units, thereby reducing data hazards and latency without waiting for register file updates.

34

Publications

1.1K

Citations

106

Authors

38

Institutions

Publications per year

2017–2026

1

Authors

106

  1. JR
    Jeff Rupley

    Intel (United States), United States

    2 publications · 104 citations

    2

    h-index

  2. JM
    Jane M. Simmons

    AT&T (United States), United States

    2 publications · 41 citations

    2

    h-index

  3. PS
    Pritpal S. Ahuja

    Princeton University, United States

    2 publications · 84 citations

    2

    h-index

  4. CW
    Chris Wilkerson

    Intel (United States), United States

    2 publications · 104 citations

    2

    h-index

  5. DW
    Douglas W. Clark

    Princeton University, United States

    2 publications · 84 citations

    2

    h-index

1–5 of 106

Venues

  1. Optics Express

    1 publications · 11 citations

    1

    h-index

  2. International Journal of Production Economics

    1 publications · 22 citations

    1

    h-index

  3. Journal of Combinatorial Theory Series B

    1 publications · 21 citations

    1

    h-index

  4. Foundations of Computational Intelligence

    Conference · 1 publications · 114 citations

    1

    h-index

  5. Ad Hoc Networks

    1 publications · 65 citations

    1

    h-index

1–5