Bus-mapped Peripherals

Bus-Mapped Peripherals is a hardware integration paradigm in which peripheral devices are connected to the central processing unit via a shared system bus and are accessed through physical memory addresses, thereby enabling I/O operations to be performed using standard memory access instructions.

7

Publications

180

Citations

13

Authors

5

Institutions

Publications per year

2017–2026

0

Authors

13

  1. DL
    Dan Linzmeier

    Motorola (United States), United States

    2 publications · 65 citations

    2

    h-index

  2. NB
    Nikolaos Bellas

    University of Thessaly, Greece

    2 publications · 65 citations

    2

    h-index

  3. MB
    M. Borgatti

    STMicroelectronics (Italy), Italy

    2 publications · 69 citations

    2

    h-index

  4. LC
    L. Calì

    STMicroelectronics (Italy), Italy

    2 publications · 69 citations

    2

    h-index

  5. MD
    Malcolm Dwyer

    Motorola (United States), United States

    2 publications · 65 citations

    2

    h-index

1–5 of 13

Venues

  1. IEEE Journal of Solid-State Circuits

    2 publications · 79 citations

    2

    h-index

  2. International Parallel and Distributed Processing Symposium

    Conference · 1 publications · 34 citations

    1

    h-index

1–3