Atomic Instructions Support is a hardware-level mechanism that provides indivisible execution of specific operations to ensure data consistency and synchronization in concurrent computing environments.
26
Publications
1.6K
Citations
67
Authors
28
Institutions
Publications per year
2017–2026
7
Publications
26
Scalable lock-free dynamic memory allocation
Maged M. Michael · 2004 · 182 citations
Fast concurrent lock-free binary search trees
Aravind Natarajan, Neeraj Mittal · 2014 · 180 citations
Introduction of local memory elements in instruction set extensions
Partha Pratim Biswas, Vinay Choudhary, Kubilay Atasu et al. · 2004 · 70 citations · Full text
1–5 of 26
Authors
67
- SH
2
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- SD
2
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- MS
2
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- AN
2
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- LN
2
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1–5 of 67
Institutions
28
Sandia National Laboratories
Albuquerque, United States
2 h-index
2 publications
47 citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
2 h-index
2 publications
222 citations
Georgia Institute of Technology
Atlanta, United States
2 h-index
6 publications
302 citations
ETH Zurich
Zurich, Switzerland
2 h-index
4 publications
94 citations
University of California, Berkeley
Berkeley, United States
2 h-index
6 publications
330 citations
University of Illinois Urbana-Champaign
Urbana, United States
2 h-index
6 publications
129 citations
The University of Texas at Dallas
Richardson, United States
2 h-index
4 publications
410 citations
Seattle University
Seattle, United States
1 h-index
1 publications
601 citations
1–8 of 28
Venues
- ACM SIGPLAN Notices
2 publications · 65 citations
2
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- Kent Academic Repository (University of Kent)
Repository · 2 publications · 53 citations
2
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- Proceedings of the ACM on Programming Languages
PACMPL · 1 publications · 29 citations
1
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- IEEE Transactions on Parallel and Distributed Systems
TPDS · 1 publications · 601 citations
1
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- Concurrency and Computation Practice and Experience
1 publications · 19 citations
1
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