Asynchronous Sequential Logic is a type of sequential logic circuit that operates without a global clock signal, where state transitions occur in response to changes in input signals directly, relying on feedback and propagation delays to determine timing behavior.
120
Publications
4.5K
Citations
225
Authors
116
Institutions
Publications per year
2017–2026
8
Parents
Publications
120
Asynchronous Techniques for System-on-Chip Design
Alain J. Martin, M. Nystrom · Proceedings of the IEEE · 2006 · 305 citations
General theory of metastable operation
Leonard R. Marino · IEEE Transactions on Computers · 1981 · 180 citations
1–5 of 120
Authors
225
- HT
6
h-index
- GM
5
h-index
- JY
5
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- SU
5
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- TM
4
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1–5 of 225
Institutions
116
Columbia University
New York, United States
6 h-index
6 publications
271 citations
University of Idaho
Moscow, United States
6 h-index
10 publications
142 citations
Techniques of Informatics and Microelectronics for Integrated Systems Architecture
Grenoble, France
5 h-index
12 publications
321 citations
Politecnico di Torino
Turin, Italy
5 h-index
10 publications
304 citations
Nanyang Technological University
Singapore, Singapore
4 h-index
14 publications
346 citations
Nokia (United States)
Coppell, United States
3 h-index
4 publications
294 citations
The University of Osaka
Osaka, Japan
3 h-index
7 publications
308 citations
Newcastle University
Newcastle upon Tyne, United Kingdom
3 h-index
10 publications
257 citations
1–8 of 116
Venues
- IEEE Transactions on Computers
28 publications · 1K citations
18
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- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
4 publications · 166 citations
4
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- IEEE Journal of Solid-State Circuits
3 publications · 68 citations
3
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- Proceedings of the IEEE
3 publications · 365 citations
3
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- IEEE Transactions on Electronic Computers
3 publications · 224 citations
3
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1–5