Asynchronous Techniques for System-on-Chip Design

TLDR

SoC design faces large parameter variations that make clock‑based delay control impractical, leading to a shift from globally asynchronous, locally synchronous (GALS) architectures toward fully asynchronous solutions, with quasi‑delay‑insensitive (QDI) circuits and arbitration/synchronization issues playing key roles. The paper aims to present core design principles, methods, and building blocks for asynchronous VLSI systems, focusing on communication and synchronization. The authors base their approach on quasi‑delay‑insensitive logic, detailing handshake protocols, validity/neutrality tests, completion trees, and building blocks for sequencing, storage, function evaluation, and buses, and they describe two alternative implementation methods for arbitrary computation as well as two key asynchronous/synchronous interfaces for GALS—one using a synchronizer and the other a stoppable clock.

Abstract

SoC design will require asynchronous techniques as the large parameter variations across the chip will make it impossible to control delays in clock networks and other global signals efficiently. Initially, SoCs will be globally asynchronous and locally synchronous (GALS). But the complexity of the numerous asynchronous/synchronous interfaces required in a GALS will eventually lead to entirely asynchronous solutions. This paper introduces the main design principles, methods, and building blocks for asynchronous VLSI systems, with an emphasis on communication and synchronization. Asynchronous circuits with the only delay assumption of isochronic forks are called quasi-delay-insensitive (QDI). QDI is used in the paper as the basis for asynchronous logic. The paper discusses asynchronous handshake protocols for communication and the notion of validity/neutrality tests, and completion tree. Basic building blocks for sequencing, storage, function evaluation, and buses are described, and two alternative methods for the implementation of an arbitrary computation are explained. Issues of arbitration, and synchronization play an important role in complex distributed systems and especially in GALS. The two main asynchronous/synchronous interfaces needed in GALS-one based on synchronizer, the other on stoppable clock-are described and analyzed.