Asynchronous Logic Support

Asynchronous Logic Support is a configurable logic block feature that enables the implementation of sequential circuits without reliance on a global clock signal, distinguishing itself by facilitating event-driven state transitions through direct handshaking protocols between components.

15

Publications

486

Citations

35

Authors

22

Institutions

Publications per year

2017–2026

0

Authors

35

  1. AM
    Alan Marshall

    University of Liverpool, United Kingdom

    2 publications · 61 citations

    2

    h-index

  2. BC
    Bill Coates

    Hewlett-Packard (United States), United States

    2 publications · 61 citations

    2

    h-index

  3. NC
    Ney Calazans

    Pontifícia Universidade Católica do Rio Grande do Sul, Brazil

    2 publications · 27 citations

    2

    h-index

  4. SM
    Steven M. Nowick

    Columbia University, United States

    2 publications · 47 citations

    2

    h-index

  5. RC
    Ricardo C. Porto

    Pontifícia Universidade Católica do Rio Grande do Sul, Brazil

    2 publications · 27 citations

    2

    h-index

1–5 of 35

Venues

  1. Design, Automation, and Test in Europe

    Conference · 1 publications · 37 citations

    1

    h-index

  2. 1

    h-index

  3. IEEE Design & Test of Computers

    1 publications · 50 citations

    1

    h-index

  4. Formal Methods in System Design

    1 publications · 122 citations

    1

    h-index

  5. Journal of Food Protection

    1 publications · 11 citations

    1

    h-index

1–5