Arithmetic Logic Optimization

Arithmetic Logic Optimization is a computational methodology within digital signal processing that systematically minimizes the arithmetic and logical operations in signal processing algorithms to enhance computational efficiency and reduce hardware resource utilization.

64

Publications

3K

Citations

157

Authors

84

Institutions

Publications per year

2017–2026

14

Authors

157

  1. MK
    Martin Kumm

    University of Kassel, Germany

    4 publications · 95 citations

    4

    h-index

  2. OG
    Oscar Gustafsson

    Linköping University, Sweden

    3 publications · 74 citations

    3

    h-index

  3. ME
    M.D. Ercegovac

    University of California, Los Angeles, United States

    3 publications · 56 citations

    3

    h-index

  4. MT
    Masamitsu Tanaka

    Nagoya University, Japan

    2 publications · 48 citations

    2

    h-index

  5. IN
    Ikki Nagaoka

    Nagoya University, Japan

    2 publications · 48 citations

    2

    h-index

1–5 of 157

Venues

  1. IEEE Transactions on Computers

    3 publications · 463 citations

    3

    h-index

  2. Signal Processing

    2 publications · 100 citations

    2

    h-index

  3. Optik

    2 publications · 92 citations

    2

    h-index

  4. Infoscience (Ecole Polytechnique Fédérale de Lausanne)

    Repository · 1 publications · 290 citations

    1

    h-index

  5. 1

    h-index

1–5