Arithmetic Circuit Synthesis

Arithmetic Circuit Synthesis is a specialized method within logic synthesis that focuses on the automated construction of digital circuits designed to perform arithmetic operations by optimizing structural and functional representations according to specified performance metrics.

514

Publications

18.7K

Citations

1K

Authors

404

Institutions

Publications per year

2017–2026

66

Authors

1K

  1. PI
    Paolo Ienne

    École Polytechnique Fédérale de Lausanne, Switzerland

    12 publications · 354 citations

    11

    h-index

  2. PB
    Philip Brisk

    University of California, Riverside, United States

    8 publications · 230 citations

    8

    h-index

  3. MC
    Maciej Ciesielski

    University of Massachusetts Amherst, United States

    7 publications · 247 citations

    7

    h-index

  4. GD
    Giovanni De Micheli

    École Polytechnique Fédérale de Lausanne, Switzerland

    7 publications · 213 citations

    7

    h-index

  5. BF
    B.J. Falkowski

    Nanyang Technological University, Singapore

    7 publications · 123 citations

    7

    h-index

1–5 of 1K

Venues

  1. IEEE Transactions on Computers

    43 publications · 2K citations

    24

    h-index

  2. 15

    h-index

  3. 11

    h-index

  4. Electronics Letters

    10 publications · 210 citations

    10

    h-index

  5. 9

    h-index

1–5