Adaptive Accelerator Design
Adaptive Accelerator Design is a hardware design methodology that belongs to the class of adaptive computing systems, distinguished by its focus on creating reconfigurable computational architectures capable of dynamically optimizing performance, power efficiency, and resource utilization in response to varying workloads, algorithms, or environmental conditions.
17
Publications
584
Citations
98
Authors
30
Institutions
Publications per year
2017–2026
11
Parents
17
FP-GNN: Adaptive FPGA accelerator for Graph Neural Networks
Teng Tian, Letian Zhao, Xiaotian Wang et al. · Future Generation Computer Systems · 2022 · 30 citations
1–5 of 17
98
1
h-index
1
h-index
1
h-index
1
h-index
1
h-index
1–5 of 98
30
Institute of Microelectronics
Beijing, China
2 h-index
13 publications
278 citations

Imperial College London
London, United Kingdom
1 h-index
2 publications
112 citations
Northeastern University
Boston, United States
1 h-index
1 publications
12 citations
Oregon State University
Corvallis, United States
1 h-index
1 publications
221 citations
Macronix International (Taiwan)
Hsinchu, Taiwan
1 h-index
1 publications
20 citations
Georgia Institute of Technology
Atlanta, United States
1 h-index
5 publications
90 citations
Center for Information Technology
Bethesda, United States
1 h-index
9 publications
108 citations
Samsung (United Kingdom)
Chertsey, United Kingdom
1 h-index
4 publications
224 citations
1–8 of 30
Conference · 1 publications · 11 citations
1
h-index
1 publications · 64 citations
1
h-index
1 publications · 20 citations
1
h-index
FGCS · 1 publications · 30 citations
1
h-index
1 publications · 16 citations
1
h-index
1–5