Neeraj Tripathi

A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels

Ruijie Xie, P. Montanini, Kerem Akarvardar et al. · 2016 · 139 citations

Engineering, Electron-beam Lithography, Finfet Technology +18

A 10nm platform technology for low power and high performance application featuring FINFET devices with multi workfunction gate stack on bulk and SOI

Kwangyou Seo, Bala Haran, Divya Gupta et al. · 2014 · 97 citations

Engineering, Vlsi Design, Finfet Technology +18

A Tersoff‐based interatomic potential for wurtzite AlN

Mihir Tungare, Yunfeng Shi, Neeraj Tripathi et al. · physica status solidi (a) · 2011 · 75 citations

Materials Science, Inorganic Chemistry, Wurtzite Aln +12

FINFET technology featuring high mobility SiGe channel for 10nm and beyond

Dechao Guo, G. Karve, Gen Tsutsui et al. · 2016 · 64 citations

Engineering, Vlsi Design, Device Integration +16

Optimal assignment of high threshold voltage for synthesizing dual threshold CMOS circuits

Neeraj Tripathi, A. Bhosle, Debasis Samanta et al. · 2002 · 32 citations

Low-power Electronics, Hardware Security, Electrical Engineering +13