U. S. Ragupathy

Low power self-controllable voltage level and low swing logic based 11T SRAM cell for high speed CMOS circuits

K. Gavaskar, U. S. Ragupathy · Analog Integrated Circuits and Signal Processing · 2018 · 40 citations

Low-power Electronics, Electrical Engineering, Engineering +7

Structure of boost DC‐link cascaded multilevel inverter for uninterrupted power supply applications

R. Uthirasamy, U. S. Ragupathy, Venkatachalam Kumar Chinnaiyan · IET Power Electronics · 2015 · 36 citations · Full text

Electrical Engineering, Engineering, Boost Dc‐link +9

Design of Novel SRAM Cell Using Hybrid VLSI Techniques for Low Leakage and High Speed in Embedded Memories

K. Gavaskar, U. S. Ragupathy, V. Malini · Wireless Personal Communications · 2019 · 29 citations

Non-volatile Memory, Electrical Engineering, Engineering +9

Design and comparative analysis of D-Flip-flop using conditional pass transistor logic for high-performance with low-power systems

R. Murugasami, U. S. Ragupathy · Microprocessors and Microsystems · 2019 · 20 citations

Low-power Electronics, Electrical Engineering, Engineering +9

Investigation on three‐phase seven‐level cascaded DC‐link converter using carrier level shifted modulation schemes for solar PV system applications

R. Uthirasamy, Venkatachalam Kumar Chinnaiyan, U. S. Ragupathy et al. · IET Renewable Power Generation · 2018 · 17 citations

Electrical Engineering, Engineering, Solar Power +14