Baher Haroun

Architectural synthesis for DSP silicon compilers

Baher Haroun, M.I. Elmasry · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1989 · 124 citations

Engineering, Computer Engineering, Computer Science +17

A PVT tolerant 0.18MHz to 600MHz self-calibrated digital PLL in 90nm CMOS process

J. Lin, Baher Haroun, Thomas Foo et al. · 2004 · 89 citations

Engineering, Electrical Engineering, Low-power Design +16

A 0.16mm<sup>2</sup> completely on-chip switched-capacitor DC-DC converter using digital capacitance modulation for LDO replacement in 45nm CMOS

Yogesh Ramadass, Ayman Fayed, Baher Haroun et al. · 2010 · 63 citations · Full text

Engineering, Electrical Engineering, Microelectronics +15

A 160 GHz Pulsed Radar Transceiver in 65 nm CMOS

Brian Ginsburg, S. Ramaswamy, Vijay Rentala et al. · IEEE Journal of Solid-State Circuits · 2014 · 55 citations

Engineering, Computer Engineering, Electrical Engineering +17

SOC CMOS technology for personal internet products

D.D. Buss, Brian L. Evans, J. Bellay et al. · IEEE Transactions on Electron Devices · 2003 · 53 citations

Engineering, Computer Engineering, Electrical Engineering +17