Kyo-Won Jin

A Fast Built-in Redundancy Analysis for Memories With Optimal Repair Rate Using a Line-Based Search Tree

Woosik Jeong, Il-Kwon Kang, Kyo-Won Jin et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2009 · 63 citations

Engineering, Computer Engineering, Computer Science +17

30.1 A 176-Stacked 512Gb 3b/Cell 3D-NAND Flash with 10.8Gb/mm² Density with a Peripheral Circuit Under Cell Array Architecture

Jaewoo Park, Doogon Kim, Sunghwa Ok et al. · 2021 · 52 citations

Engineering, Computer Engineering, Electrical Engineering +15

A 1-Tb, 4b/Cell, 176-Stacked-WL 3D-NAND Flash Memory with Improved Read Latency and a 14.8Gb/mm2 Density

Wanik Cho, Jongseok Jung, Jongwoo Kim et al. · 2022 IEEE International Solid- State Circuits Conference (ISSCC) · 2022 · 38 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 66-333-MHz 12-mW register-controlled DLL with a single delay line and adaptive-duty-cycle clock dividers for production DDR SDRAMs

Young-Jin Jeon, Joong-Ho Lee, Hyun‐Chul Lee et al. · IEEE Journal of Solid-State Circuits · 2004 · 36 citations

Engineering, Computer Engineering, Electrical Engineering +14

A 1.1-V 10-nm Class 6.4-Gb/s/Pin 16-Gb DDR5 SDRAM With a Phase Rotator-ILO DLL, High-Speed SerDes, and DFE/FFE Equalization Scheme for Rx/Tx

Dongkyun Kim, Kibong Koo, Yongmi Kim et al. · IEEE Journal of Solid-State Circuits · 2019 · 32 citations

Engineering, Computer Engineering, Electrical Engineering +17