Z. C. Hsiao

TSV process using bottom-up Cu electroplating and its reliability test

Hwan‐You Chang, Chi-Chang Hsu, Z. C. Hsiao et al. · 2008 · 22 citations

Engineering, Electrical Engineering, Materials Science +13

3D stacked chip technology using bottom-up electroplated TSVs

Hwan‐You Chang, Z. C. Hsiao, Cheng-Yen Chiang et al. · 2009 · 21 citations

Engineering, Electrical Engineering, Materials Science +15

Process integration and reliability test for 3D chip stacking with thin wafer handling technology

Hwan‐You Chang, J. H. Huang, Cheng-Yen Chiang et al. · 2011 · 19 citations

Engineering, Electrical Engineering, Materials Engineering +17

Wafer-level 3D integration with Cu TSV and micro-bump/adhesive hybrid bonding technologies

C. T. Ko, Z. C. Hsiao, Y. J. Chang et al. · 2012 · 12 citations

Engineering, Computer Engineering, Computer-aided Design +16